Experience
IBM · Power systems performance
October 2024 - October 2026
C/C++ performance modelling in a gem5-derived simulator, cache-coherence work, microarchitectural debugging, simulator-to-RTL correlation, fabric bandwidth/latency analysis and PMU validation.
AMD · Ryzen core performance modelling
December 2023 - June 2024
Performance modelling infrastructure, regression studies, flow automation, PMC post-processing and investigation of simulator-to-RTL correlation differences.
Qualcomm · Hexagon DSP performance
November 2021 - December 2023
Pre-silicon performance verification for Hexagon DSP cores, workload characterisation and directed cache-feature tests.
Research and earlier work
At IIT Hyderabad, I studied hardware performance counters and DNN layer identification, leading to an ACM AIMLSystems ’21 publication. Earlier work includes technical and computational support at DRDO and research and teaching assistance at IIT Guwahati.
The full resume retains detailed roles, dates, education and publication references.